• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The invention relates to an arrangement for an optoelectronic component, having: a substrate (7); an optical semiconductor chip (1) which is arranged on the substrate (7) and is connected to a first substrate-side electrical connection (8); an optically active region (5) of the optical semiconductor chip (1), which is set up to receive light during operation and to convert it into electrical charges; a first optically non-active region of the optical semiconductor chip (1), in which a chip-side electrical connection (9) and a connecting structure are formed which electrically conductively connects the chip-side electrical connection (9) to the optically active region (5); a second optically inactive area of said optical semiconductor chip (1) formed separately from said first optically inactive area and covered with a protective layer; an electrical connection (11) which connects the chip-side electrical connection (9) to a second substrate-side electrical connection (10); and a coating in which the following is provided in a layer stack in the optically active region (5) and in the first and the second optically non-active region: a first layer made of at least one of the materials SiO 2 and Si 3 N 4 and a second layer (12) of inorganic material disposed in the layer stack above the first layer. The chip-side electrical connection (9) and the connection structure in the first optically inactive area and the protective layer in the second optically inactive area are each arranged between the first and the second layer of the coating. Furthermore, an optoelectronic component and a method for producing an arrangement for an optoelectronic component are provided.
    公开号:CH717597A2
    申请号:CH00748/21
    申请日:2021-06-28
    公开日:2021-12-30
    发明作者:Wilke Martin；Friedrich Sabine；Dobritz Stephan
    申请人:First Sensor AG；
    IPC主号:
    专利说明:

    The invention relates to an arrangement for an optoelectronic component and a method for producing the arrangement and an optoelectronic component.
    background
    [0002] Optoelectronic components usually have an optical semiconductor chip which is arranged on a substrate and is connected to an electrical contact on the substrate. The optoelectronic semiconductor chip has an optically active area that is set up to receive and/or emit light during operation. Connections of the optical semiconductor chip are connected to connections on the substrate side, for example by means of wire bonding.
    [0003] Such an optoelectronic component is known, for example, from the document WO 2015/044 529 A1. A protective layer is provided on the substrate of the optoelectronic component, which protective layer extends and covers the assembly of substrate and optical semiconductor chip. In this case, an electrical connection formed on the substrate is arranged below the protective layer.
    [0004] Document DE 10 2009 058 796 A1 discloses an optoelectronic component and a method for producing it. The optoelectronic component has an inorganic optoelectronically active semiconductor component with an optically active region which is suitable for emitting or receiving light during operation. A sealing material applied by means of atomic layer deposition is arranged on at least one surface area and covers the surface area in a hermetically sealed manner.
    [0005] Document US Pat. No. 7,939,932 B2 provides for a semiconductor chip to be coated on the surface with an inorganic dielectric film material, in particular Al2O3 or TiO2, which also includes coating the electrical connections.
    [0006] Document WO 2018/019 921 A1 discloses an optical sensor in which a layer of a photoconductive material is provided with an outer cover layer.
    summary
    The object of the invention is to specify an arrangement for an optoelectronic component and an optoelectronic component and a method for producing it, with which the antireflective properties on the optoelectronic component of an outer surface are improved.
    To solve an arrangement for an optoelectronic component according to the independent claim 1 and an optoelectronic component according to the independent claim 10 are created. Furthermore, a method for producing an arrangement for an optoelectronic component according to independent claim 11 is provided. Configurations are the subject of dependent subclaims.
    [0009] According to one aspect, an arrangement for an optoelectronic component is created, which has the following: a substrate; an optical semiconductor chip arranged on the substrate and connected to a first substrate-side electrical connection; an optically active area of the optical semiconductor chip, which is set up to receive light during operation and to convert it into electrical charges; a first optically non-active region of the optical semiconductor chip, in which a chip-side electrical connection and a connection structure are formed, which electrically conductively connects the chip-side electrical connection to the optically active region; a second optically inactive area of the optical semiconductor chip formed separately from the first optically inactive area and covered with a protective layer; an electrical connection connecting the chip-side electrical connection to a second substrate-side electrical connection; and a coating in which the following is provided in a layer stack in the optically active region and in the first and the second optically non-active region: a first layer made of at least one of the materials SiO2 and Si3N4 and a second layer made of an inorganic material which located in the layer stack above the first layer; wherein the chip-side electrical connection and the connection structure are arranged in the first optically non-active area and the protective layer is arranged between the first and the second layer of the coating in the second optically non-active area.
    [0010] According to a further aspect, a method for producing an arrangement for an optoelectronic component is created, which has the following: providing a substrate; arranging an optical semiconductor chip on the substrate, the optical semiconductor chip being electrically connected to a first substrate-side connection and having an optically active region which is set up to receive light during operation and to convert it into electrical charges; producing a chip-side electrical connection and a connection structure, which electrically conductively connects the chip-side electrical connection to the optically active region, in a first optically non-active region of the optical semiconductor chip; forming a protective layer in a second optically inactive area of the optical semiconductor chip formed separately from the first optically inactive area; Establishing an electrical connection between the chip-side electrical connection and a second substrate-side electrical connection; and producing a coating in which the following is provided in a layer stack in the optically active region and in the first and the second optically non-active region: a first layer made of at least one of the materials SiO2 and Si3N4 and a second layer made of an inorganic material which is placed in the layer stack above the first layer; wherein the chip-side electrical connection and the connection structure are arranged in the first optically non-active area and the protective layer is arranged in the second optically non-active area between the first and the second layer of the coating.
    [0011] Furthermore, an optoelectronic component with such an arrangement is provided.
    In the arrangement provided for the optoelectronic component, the coating in the optically active region and in the first and second optically non-active regions of the optical semiconductor chip has a different layer structure, which is in particular a consequence of the integration of the chip-side electrical connection, the connection structure and the protective layer between the first and second layers of the coating. In this way, desired (different) properties, in particular reflection properties, for light incident on the surface of the arrangement or the surface of the optoelectronic component can be formed in the optically active region and the optically non-active regions.
    [0013] The first layer of the coating can be formed with a different layer thickness in the different areas which it covers, ie the optically active area as well as the first and second optically non-active area.
    [0014] In addition to the first and the second layer, the coating can have at least one further layer.
    The protective layer is set up to reduce the incidence of light in the semiconductor chip in the area outside the optically active area. In an embodiment, the protective layer may be of the same material as the interconnect structure.
    [0016] The first optically non-active area can have areas that are not covered by the connection structure and the chip-side electrical connection. In these areas, the first layer can consist of at least one of the materials SiO2 and Si3N4. A layer thickness formed can differ from that in the optically active region.
    The first optically non-active region can partially or completely surround the second optically non-active region.
    The various electrical connections can be formed, for example, with a so-called contact pad and/or conductor tracks. The electrical connection between the chip-side electrical connection and the second substrate-side electrical connection can be formed by means of wire bonding, for example.
    [0019] When arranging on the substrate, the optical semiconductor chip can be glued on, for example.
    [0020] The proposed technology enables high sensitivity and high reliability for optical sensor systems. In order to achieve high sensitivity, the entire chip surface, which is formed with a sensitive (optically active) and non-sensitive (optically inactive) area, can be anti-reflective for a target wavelength or a target wavelength range. The anti-reflection coating in the optically active area serves to achieve high light output in the sensor, which can be converted into an electrical signal. This is important for high sensitivity. The antireflection coating in the optically non-active area(s) serves in particular to minimize back reflections onto the optically active area and to avoid false signals caused thereby.
    For high reliability of the systems in which the sensor chip is installed, the active chip surface can be provided with protection that prevents halides or other contaminants from coming into contact with the contact pads, conductor tracks and metal structures. This contamination is applied, for example, when bonding wires are potted (glob top), the chip surface is glued to optical system components or the system is potted (“dam and fill” or “moulding”). The filled or unfilled polymers used for this or other processes often contain components that promote or trigger corrosion of the chip.
    By means of the coating, a first reflectivity can be formed for an optical (target) wavelength range between a first and a second wavelength in the optically active region and a second reflectivity in the first and second optically non-active region, which for the wavelength range is in each case greater than the first reflectivity. The second reflectivity in the first and the second optically non-active region can be the same or different, it always being greater than the first reflectivity for the wavelength region. The coating can therefore also be referred to as an anti-reflection coating.
    In one embodiment it is provided that the optical wavelength range includes wavelengths from about 840 nm to about 980 nm, alternatively a wavelength range from about 880 nm to about 915 nm. A development of the reflectivity behavior in other wavelength ranges can also be provided. The multi-layer design of the coating makes it possible to choose different materials for the layers.
    The first reflectivity cannot be greater than about 10 percent in the optically active range for the wavelength range. In one configuration it can be provided that the first reflectivity in the optically active region is not greater than approximately 6 percent, alternatively not greater than approximately 3 percent. In the optically active area, there is a residual reflection that is greater than 0 percent.
    The second reflectivity in the optically non-active region cannot be greater than about 50 percent for the wavelength range. In one configuration, the second reflectivity in the optically non-active region cannot be greater than approximately 40 percent, alternatively not greater than approximately 30 percent. The antireflection effect in the area of the chip-side electrical connection is based on the interaction of the first and the second layer of the coating and the multi-layer arrangement of the chip-side electrical connection, which is arranged between them.
    The coating can be designed as a continuous coating in the optically active area and in the first and the second optically non-active area. In addition, it can be provided that the coating is also formed continuously in a region between the optically active region and the optically non-active regions. In the case of the composite with substrate and optical semiconductor chip, the coating can be formed to cover an entire cover-side surface. If the arrangement is provided in an optoelectronic component, a surface area onto which light can fall during operation can be essentially completely covered with the coating.
    It is also possible for surface regions of the optical semiconductor chip to be covered with the coating up to the region of the substrate which do not run transversely to the direction of light incidence, for example also surface regions which are more aligned in the direction of light incidence.
    An optical window component can be arranged on the coating above the optically active region. The window optical member may be made of a glass material. The optical window component can have optical filter properties, for example in that it is set up to transmit only light in a target wavelength range, for example in the range from about 840 nm to about 980 nm. To arrange it in the optically active area, the window component can be glued, in particular directly onto the coating.
    The electrical connection can have an electrical line or an electrical line section which is at least partially covered on the surface side by the second layer of the coating. The electrical connection can be formed by means of a wire, the surface of which is covered with the second layer of the coating. Establishing the electrical connection by means of wire bonding can be provided.
    The multi-layer structure of the chip-side electrical connection can have a first layer made of an aluminum material. The first layer of the aluminum material can form a bottom layer in the multi-layer structure of the chip-side electrical connection. One layer or several further layers in a multi-layer structure are arranged on the bottom layer. The first layer of the multi-layer structure of the chip-side electrical connection made of aluminum material can be arranged in direct contact with the first layer of the coating, ie deposited on it. The aluminum material can comprise aluminum or an aluminum alloy, for example AISi, AlSiCu or AICu. A layer thickness of approximately 300 nm to approximately 1400 nm can generally be provided for the first layer, for example when it is formed from the aluminum material.
    The electrically conductive connection structure can have at least one metal layer made of a metal material from the following group: Al, Cr, Ti, W, Ni, V, an oxide of Al, Cr, Ti, W, Ni or V and an alloy, whose main component is Al, Cr, Ti, W, Ni or V. The electrically conductive connection structure can be formed in one layer or with a multi-layer structure. In the case of the multi-layer structure, the configuration options mentioned above apply correspondingly to each of the layers in the stack. In the case of a multi-layer structure, a metal layer can form the top layer. In one possible embodiment, the layer stack can consist of two layers, for example an aluminum layer and a chromium layer arranged thereon. Possible layer examples include at least one arrangement from the following group: Al; AlSi (an Al layer alloyed with Si); Al + Cr (aluminum with chromium layer thereon); Al + Cr3O3(aluminium with chromium oxide layer on top) and AlSi + Cr + Cr2O3(aluminium with chromium oxide layer and titanium on top).
    The preceding explanations regarding the layer structure and the materials apply correspondingly to the chip-side electrical connection. In one embodiment, this is formed in one layer, for example as an aluminum layer. Such a design can be produced, for example, by first producing the areas of chip-side electrical connection and electrically conductive connection structure as a two-layer structure and subsequently removing the upper layer, for example the chromium layer in the area of the chip-side electrical connection.
    The configurations described above in connection with the arrangement for the optoelectronic component can be provided accordingly in connection with the optoelectronic component and the method for producing the arrangement.
    [0034] Provision can be made in the manufacturing method for the first layer of the coating to be applied while the optical semiconductor chip is still arranged in the wafer assembly, before the step for isolating the chips is then carried out. The first layer of the coating is thus formed both in the optically active area and in the optically non-active area. After the wafer has been separated to form the optical semiconductor chip, the semiconductor chip is applied to the substrate, for example by means of gluing. After the electrical connections have been formed, the second layer of the coating can be deposited, for which purpose "atomic layer deposition" technology can be used, for example. The second layer is also applied both in the optically active area and in the optically non-active area in which the chip-side electrical connection with its multi-layer structure is arranged. Deposition of the second layer of the coating can be carried out at low temperatures, for example at temperatures from about 150°C to about 300°C. This enables the second layer of coating to be deposited during a packaging process.
    [0035] The second layer of the coating can cover essentially the entire composite of substrate and optical semiconductor chip, it being possible for a rear side of the substrate to remain uncoated.
    [0036] Further steps can then follow in the production process, for example the application of an optical window component in the optically active area on the front side of the optical semiconductor chip, for example by means of gluing.
    The coating can form a moisture barrier to keep moisture away from the chip surface and the electrical connections. The coating can therefore also be referred to as an anti-reflection and protective coating (multifunctional coating).
    Description of exemplary embodiments
    Further exemplary embodiments are explained below with reference to figures of a drawing. 1 shows a schematic perspective illustration of a diced optical semiconductor chip which has a first layer of a functional coating on the top side; 2 shows a schematic representation of an arrangement in which the optical semiconductor chip is arranged on a substrate and an electrical connection on the chip side is electrically connected, the entire assembly being covered with a second layer of the functional coating; and FIG. 3 shows a schematic illustration of the arrangement from FIG. 2, in which an optical window component is arranged on the optical semiconductor chip in an optically active area of the optical semiconductor chip; and FIG. 4 shows a schematic representation of a further arrangement in which the optical semiconductor chip is arranged on a substrate, in plan view.
    1 shows a schematic representation of an optical semiconductor chip 1 which has been isolated from a wafer assembly and has a first layer 3 of a coating 4 on a top surface 2 . The first layer 3 was still deposited at the wafer level and is formed continuously both in an optically active region 5 and in a first optically non-active region 6 of the optical semiconductor chip 1 . The first layer 3 can consist of, for example, SiO2, Si3N4 or a combination of these materials.
    The first layer 3 of the coating 4 consists of at least one of the materials SiO2 and Si3N4. In this case, SiO2 and/or Si3N4 can be provided with a respective layer thickness of approximately 5 nm to approximately 250 nm and Si3N4 of approximately 5 nm to 250 nm.
    shows a schematic representation of an arrangement in which the optical semiconductor chip 1 is now arranged on a substrate 7, for example by means of an adhesive material 7a. The optical semiconductor chip 1 is electrically contacted via a first substrate-side electrical connection 8 . The substrate 7 can be formed, for example, by means of a printed circuit board that has conductor tracks for the electrical connections.
    On the top surface 2 of the optical semiconductor chip 1, on the first layer 3, a chip-side electrical connection 9 is produced with a multi-layer structure. An electrical connection 11 is formed between the chip-side electrical connection 9 and a second substrate-side electrical connection 10, for example by means of wire bonding. The chip-side electrical connection 9 and/or the substrate-side electrical connections 8, 10 can be contact pads or conductor tracks.
    A second layer 12 of the coating 4 is applied covering the entire surface of the assembly shown in FIG. 2, ie both in the optically active region 5 and in the first optically non-active region 6, but also on sections 13 and side surfaces on the substrate side 14 of the optical semiconductor chip 1. The second layer 12 is made of an inorganic material. It can be a multilayer structure with two or more materials that have a different refractive index and can be deposited alternately. In the simplest case it is a two-layer system. In one embodiment, the following can be provided: Al2O3(20nm) and Ta2O5(65nm) thereon. However, these two layers can also be deposited alternately one after the other in thinner layers, also with different thicknesses (e.g. 20 layer sequences of Al2O3 and Ta2O5, each with different layer thicknesses). The overall thickness of the multilayer structure can be less than about 250 nm, for example. The individual layers have at least a layer thickness of about 1 nm.
    With the help of the coating 4, the reflectivity in the arrangement with the optical semiconductor chip 1 and the substrate 7 is reduced on the surface side (wavelength-selective), whereby in the optically active region 5 and in the first optically non-active region 6 with the chip-side electrical connection 9 a different reflectivity (reflectivity) is formed. Here, the reflectivity in the optically active region 5 for a selected wavelength range is significantly lower than in the first optically non-active region 6. For example, the optical reflectivity for a target wavelength or a target wavelength range in the optical region 5 is less than about 6%, alternatively less than about 3% or about 1%. In contrast, in the first optically non-active region 6 with the chip-side electrical connection 9 the optical reflectivity for the target wavelength or the target wavelength range can be less than about 50%, alternatively less than about 30% or less than about 10%.
    According to FIG. 3, the manufacturing process then provides for an optical window component 15 to be applied in the optically active region 5 of the optical semiconductor chip 1, for example by means of gluing. The optical window component 15 can consist of a glass material, for example, and optionally provide optical filter properties.
    In one configuration it can be provided that the second layer 12 of the coating 4 is applied or deposited before the electrical connection 11 is formed. In this case, the electrical connection 11 is produced through the second layer 12, for example by means of wire bonding. The second layer 12 forms a protection against contamination that can occur during wire bonding. The second layer 12 of the coating 4 also protects the chip-side electrical connection 9 from contamination, for example during gluing or other packaging processes after the electrical connection 11 has been formed, which takes place, for example, by means of wire bonding.
    4 shows a schematic representation of a further arrangement, in which the optical semiconductor chip 1 is arranged on a substrate 7, in plan view. The same reference symbols are used for the same features. The chip-side electrical connection 9 is arranged in the first optically non-active region 6 and is connected to the optical semiconductor chip 1 via an electrically conductive connection structure 16 . The electrically conductive connection structure 16 can have a metal layer made of at least one metal from the following group: Al, Cr, Ti, W, Ni, V, an oxide of Al, Cr, Ti, W, Ni or V and an alloy whose main component Al, Cr, Ti, W, Ni or V. The electrically conductive connection structure can be formed in one layer or with a multi-layer structure. In the case of the multi-layer structure, the configuration options mentioned above apply correspondingly to each of the layers in the stack. In the case of a multi-layer structure, a metal layer can form the top layer. In one possible embodiment, the layer stack can consist of two layers, for example an aluminum layer and a chromium layer arranged thereon.
    Outside the optically active region 5 is formed next to the first optically non-active region 6 and a second optically non-active region 17 in which a protective layer 18 is deposited, the penetration of light into the optical semiconductor chip 1 in the second optically non-active region 17 is reduced or essentially completely prevented. The layer structure can be the same as the layer structure of the electrically conductive connection structure 16 .
    [0049] Further configuration options are explained below.
    In one configuration, the first layer 3 can be produced as a layer with a thickness of approximately 20 nm from SiO2.
    In this or other configurations, the chip-side electrical connection 9 can have a metallization with the following layers in a multi-layer structure: 1.1 μm Al and 60 nm Cr.
    In the various configurations, the second layer 12 of the coating 4 can be formed from AlN with a layer thickness of approximately 80 μm. However, other electrically insulating materials (insulator materials) can also be used, in which case a layer thickness of approximately 10 nm to approximately 250 nm can be provided.
    [0053] Further exemplary embodiments can provide one or more of the following configurations:HfO2(95nm) on a layer stack on the optical semiconductor chip: pixel (SiO220nm) / metal (about 1µm Al + 60nm Cr)Al2O3(105nm) on a layer stack on the optical semiconductor chip: pixel (SiO220nm) / metal (about 1µm + 60nm Cr)Al2O330nm + AIN 50nm on a layer stack on the optical semiconductor chip: pixel (SiO220nm) / metal (about 1µm + 60nm Cr)Al2O330nm + AIN 50nm on a layer stack on the optical semiconductor chip: pixel (SiO220nm) / metal (about 1µm + 100nm Ti)Al2O320nm + Ta2O565nm on a layer stack on the optical semiconductor chip: pixel (SiO220nm) / metal (about 1µm + 60nm Cr)
    The features disclosed in the above description, the claims and the drawing can be important both individually and in any combination for the realization of the various versions.
    权利要求:
    Claims (11)
    [1]
    1. Arrangement for an optoelectronic component, with:- a substrate (7);- An optical semiconductor chip (1), which is arranged on the substrate (7) and connected to a first substrate-side electrical connection (8);- An optically active region (5) of the optical semiconductor chip (1), which is set up to receive light during operation and to convert it into electrical charges;- A first optically non-active region (6) of the optical semiconductor chip (1), in which a chip-side electrical connection (9) and a connecting structure (16) are formed, which connect the chip-side electrical connection (9) to the optically active region ( 5) electrically conductively connects;- a second optically inactive region (17) of the optical semiconductor chip (1) formed separately from the first optically inactive region (6) and covered with a protective layer (18);- An electrical connection (11) which connects the chip-side electrical connection (9) to a second substrate-side electrical connection (10); and- A coating (4), in which the following is provided in a layer stack in the optically active region (5) and in the first and the second optically non-active region (6; 17):- a first layer (3) made of at least one of the materials SiO2 and Si3N4and- a second layer (12) of an inorganic material, which is arranged in the layer stack above the first layer (3);whereby- The chip-side electrical connection (9) and the connection structure (16) in the first optically non-active area (6) and- The protective layer (18) in the second optically non-active region (17) are arranged between the first and the second layer (3, 12) of the coating (4).
    [2]
    2. Arrangement according to claim 1, characterized in that by means of the coating (4) for an optical wavelength range between a first and a second wavelength in the optically active region (5) has a first reflectivity and in the first and the second optically non-active Area (6; 17) is formed in each case a second reflectivity, which is greater than the first reflectivity for the wavelength range.
    [3]
    3. Arrangement according to claim 2, characterized in that the first reflectivity in the optically active region (5) for the wavelength range is not greater than 10 percent.
    [4]
    4. Arrangement according to claim 2 or 3, characterized in that the second reflectivity in the first and the second optically non-active region (6; 16) for the wavelength range is in each case not greater than 50 percent.
    [5]
    5. Arrangement according to at least one of the preceding claims, characterized in that the coating (4) in the optically active region (5) and in the first and the second optically non-active region (6; 16) is in each case designed as a continuous coating .
    [6]
    6. Arrangement according to at least one of the preceding claims, characterized in that an optical window component (16) is arranged above the optically active region (5) on the coating (4).
    [7]
    7. Arrangement according to at least one of the preceding claims, characterized in that the electrical connection (11) has an electrical line which is covered on the surface side at least in sections by the second layer (12) of the coating (4).
    [8]
    8. Arrangement according to at least one of the preceding claims, characterized in that the multi-layer structure of the chip-side electrical connection (9) has a first layer made of an aluminum material.
    [9]
    9. Arrangement according to at least one of the preceding claims, characterized in that the electrically conductive connection structure (16) has a metal layer made of a metal material from the following group: Al, Cr, Ti, W, Ni, V, an oxide of Al, Cr , Ti, W, Ni or V and an alloy whose main component is Al, Cr, Ti, W, Ni or V.
    [10]
    10. Optoelectronic component with an arrangement according to at least one of the preceding claims.
    [11]
    11. A method for producing an arrangement for an optoelectronic component, with:- Providing a substrate (7);- arranging an optical semiconductor chip (1) on the substrate (7), wherein the optical semiconductor chip (1) is electrically connected to a first substrate-side connection (8) and has an optically active region (5) which is set up during operation to receive light and convert it into electrical charges;- Production of a chip-side electrical connection (9) and a connecting structure (16) which electrically conductively connects the chip-side electrical connection (9) to the optically active region (5) in a first optically non-active region (6) of the optical semiconductor chip (1);- forming a protective layer (18) in a second optically inactive region (17) of the optical semiconductor chip (1) which is formed separately from the first optically inactive region (6);- Establishing an electrical connection (11) between the chip-side electrical connection (9) and a second substrate-side electrical connection (10); and- Production of a coating (4), in which the following is provided in a layer stack in the optically active region (5) and the first and the second optically non-active region (6; 17):- a first layer (3) made of at least one of the materials SiO2 and Si3N4and- a second layer (12) of an inorganic material, which is arranged in the layer stack above the first layer (3);whereby- The chip-side electrical connection (9) and the connection structure (16) in the first optically non-active area (6) and- The protective layer (18) in the second optically non-active region (17) are arranged between the first and the second layer (3, 12) of the coating (4).
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    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US7939932B2|2007-06-20|2011-05-10|Analog Devices, Inc.|Packaged chip devices with atomic layer deposition protective films|
    DE102009058796A1|2009-12-18|2011-06-22|OSRAM Opto Semiconductors GmbH, 93055|Optoelectronic component and method for producing an optoelectronic component|
    FI20135967A|2013-09-27|2015-03-28|Lumichip Oy|INSTALLATION LEVEL MULTIFUNCTIONAL CAPSULATION LAYER AND METHOD FOR MANUFACTURING IT|
    WO2018019921A1|2016-07-29|2018-02-01|Trinamix Gmbh|Optical sensor and detector for optical detection|
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    DE102020117238.9A|DE102020117238A1|2020-06-30|2020-06-30|Arrangement for an optoelectronic component, method of production and optoelectronic component|
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